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 # Pwm

 Last update: 16.07.2025 

The flow of Pulse-Width Modulation is 1 during the first part of the period and 0 during the second one for every number of cycles. The length of the part is defined by the duty cycle, from 0% to 100% of the period.

The figure shows the output flow for a PWM with the following inputs:

- cycles: 10
- dutyCycle: 0.7 (70%)
- amplitude: 1
- offset: 0

![](/sites/default/files/git_ansys/scade_one_library_2025_r2_1/n__pwm_00.svg)

## Interface

NameKindTypeCommentcyclesIunsignedNumber of cycles for a period  
Range: > 1dutyCycleIfloatSwitch reference value for on power, expressed in percent, 100% being fully on.  
Range: \[0, 1\]amplitudeIfloatGain to be applied to the output flow (default 1)offsetIfloatOffset to be added to the output flow (default 0)flowOfloatOutput flow**Parent topic:**[Sources::N](./sources_n.md)